62 if(rampz != NULL)
delete rampz;
75 AvrDevice(224, 4096, ext_bytes, flash_bytes),
82 portg(this,
"G", false, 5),
83 assr_reg(&coreTraceGroup,
"ASSR"),
84 sfior_reg(&coreTraceGroup,
"SFIOR"),
85 prescaler0(this,
"0",
PinAtPort(&portg, 4), &assr_reg, 3, &sfior_reg, 1, 7),
86 prescaler123(this,
"123", &sfior_reg, 0, 7),
88 premux1(&prescaler123,
PinAtPort(&portd, 6)),
89 premux2(&prescaler123,
PinAtPort(&portd, 7)),
90 premux3(&prescaler123,
PinAtPort(&porte, 6)),
95 bool is_m128 = (flash_bytes == 128 * 1024);
219 rw[0x8c]= & timer3->tccrc_reg;
220 rw[0x8b]= & timer3->tccra_reg;
221 rw[0x8a]= & timer3->tccrb_reg;
222 rw[0x89]= & timer3->tcnt_h_reg;
223 rw[0x88]= & timer3->tcnt_l_reg;
224 rw[0x87]= & timer3->ocra_h_reg;
225 rw[0x86]= & timer3->ocra_l_reg;
226 rw[0x85]= & timer3->ocrb_h_reg;
227 rw[0x84]= & timer3->ocrb_l_reg;
228 rw[0x83]= & timer3->ocrc_h_reg;
229 rw[0x82]= & timer3->ocrc_l_reg;
230 rw[0x81]= & timer3->icr_h_reg;
231 rw[0x80]= & timer3->icr_l_reg;
236 rw[0x7a]= & timer1->tccrc_reg;
237 rw[0x79]= & timer1->ocrc_h_reg;
238 rw[0x78]= & timer1->ocrc_l_reg;
267 rw[0x4f]= & timer1->tccra_reg;
268 rw[0x4e]= & timer1->tccrb_reg;
269 rw[0x4d]= & timer1->tcnt_h_reg;
270 rw[0x4c]= & timer1->tcnt_l_reg;
271 rw[0x4b]= & timer1->ocra_h_reg;
272 rw[0x4a]= & timer1->ocra_l_reg;
273 rw[0x49]= & timer1->ocrb_h_reg;
274 rw[0x48]= & timer1->ocrb_l_reg;
275 rw[0x47]= & timer1->icr_h_reg;
276 rw[0x46]= & timer1->icr_l_reg;
277 rw[0x45]= & timer2->tccr_reg;
278 rw[0x44]= & timer2->tcnt_reg;
279 rw[0x43]= & timer2->ocra_reg;
307 rw[0x28]= & acomp->acsr_reg;
oscillator version 3.x and older, 8bit, one range
ADC reference is selected on 3 or 4 different sources: Vcc, aref pin, bandgap or 2.56V reference.
Basic AVR device, contains the core functionality.
0:aref, 1:vcc, 2:-, 3:2.56V
AddressExtensionRegister * rampz
RAMPZ address extension register.
AVR device class for ATMega64, see AvrDevice_atmega128base.
PrescalerMultiplexerExt premux1
prescale multiplexer for timer1
IOSpecialReg * eifr_reg
EIFR IO register.
PrescalerMultiplexer premux0
prescale multiplexer for timer0
ExternalIRQHandler * extirq
external interrupt support
Implements a stack with stack register using RAM as stackarea.
IOReg< HWUart > ubrrhi_reg
IO register "UBRRxH" - baudrate.
IOReg< HWEeprom > eedr_reg
IOReg< HWTimer8_1C > tccr_reg
control register
void registerIrq(int vector, int irqBit, ExternalIRQ *extirq)
Pin & GetPin(unsigned char pinNo)
returns a pin reference of pin with pin number
HWTimer8_1C * timer2
timer 2 unit
Timer unit with 8Bit counter and one output compare unit.
ICaptureSource inputCapture1
input capture source for timer1
IOReg< HWTimer8 > tcnt_reg
counter register
IOSpecialReg * eicra_reg
EICRA IO register.
Handler for external IRQ's to communicate with IRQ system and mask/flag registers.
Represents a timer interrupt line, Frontend for timer interrupts.
TimerIRQRegister * timer3irq
timer interrupt unit for timer 3
void SetFuseConfiguration(int size, unsigned long defvalue)
Configure fuses.
IOReg< AddressExtensionRegister > ext_reg
OSCCALRegister * osccal_reg
OSCCAL IO register.
AVRDevice class for ATMega64 and ATMega128.
HWTimer8_1C * timer0
timer 0 unit
IOReg< HWUart > ubrr_reg
IO register "UBRRxL" - baudrate.
ICaptureSource inputCapture3
input capture source for timer3
IOSpecialReg tifr_reg
the TIFRx register
AvrDevice_atmega128base(unsigned flash_bytes, unsigned ee_bytes, unsigned ext_bytes, unsigned nrww_start)
Implements the I/O hardware necessary to do USART transfers.
IOReg< HWUart > ucsra_reg
IOSpecialReg sfior_reg
SFIOR IO register.
XDIVRegister * xdiv_reg
XDIV IO register.
HWUsart * usart0
usart 0 unit
PrescalerMultiplexerExt premux3
prescale multiplexer for timer3
TraceValueCoreRegister coreTraceGroup
IOReg< HWUart > ucsrb_reg
ADC type M64: ADC on atmega64.
IOReg< HWEeprom > eearh_reg
HWARef * aref
adc reference unit
IOSpecialReg * eimsk_reg
EIMSK IO register.
Pin * GetPin(const char *name)
HWUsart * usart1
usart 1 unit
Timer unit with 16Bit counter and 3 output compare units.
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
IOReg< HWEeprom > eecr_reg
AVR device class for ATMega128, see AvrDevice_atmega128base.
void registerLine(int idx, IRQLine *irq)
PrescalerMultiplexerExt premux2
prescale multiplexer for timer2
#define AVR_REGISTER(name, class)
RWMemoryMember ** rw
The whole memory: R0-R31, IO, Internal RAM.
TimerIRQRegister * timer012irq
timer interrupt unit for timer 0 to 2
ADC type M128: ADC on atmega128.
Provides the programming engine for flash self programming.
void SetBootloaderConfig(unsigned addr, int size, int bPosBOOTSZ, int bPosBOOTRST)
Set bootloader support configuration.
IOReg< HWEeprom > eearl_reg
HWTimer16_3C * timer1
timer 1 unit
IOReg< HWTimer8 > ocra_reg
output compare A register
RWSreg * statusRegister
the memory interface for status
IOSpecialReg * eicrb_reg
EICRB IO register.
IRQLine * getLine(const std::string &name)
FlashProgramming * spmRegister
IOSpecialReg assr_reg
ASSR IO register.
HWAdmux * admux
adc multiplexer unit
HWTimer16_3C * timer3
timer 3 unit
IOReg< HWUsart > ucsrc_reg
IOSpecialReg timsk_reg
the TIMSKx register
Analog comparator peripheral.
IOReg< FlashProgramming > spmcr_reg
Implement OSCCAL register.
HWAcomp * acomp
analog compare unit
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
bool flagELPMInstructions
ELPM instructions are available (only on devices with bigger flash)