44 prescaler(this, "01"),
45 premux0(&prescaler,
PinAtPort(&portd, 4)),
48 flagJMPInstructions =
false;
49 flagMULInstructions =
false;
50 flagMOVWInstruction =
false;
51 fuses->SetFuseConfiguration(6, 0xda);
52 v_bandgap.SetAnalogValue(1.22);
57 admux =
new HWAdmux6(
this, &portc.GetPin(0), &portc.GetPin(1), &portc.GetPin(2),
58 &portc.GetPin(3), &portc.GetPin(4), &portc.GetPin(5));
62 spi=
new HWSpi(
this, irqSystem,
PinAtPort(&portb, 3),
PinAtPort(&portb, 4),
PinAtPort(&portb, 5),
PinAtPort(&portb, 2), 7,
false);
69 timer01irq->registerLine(1,
IRQLine(
"TOV0", 6));
70 timer01irq->registerLine(3,
IRQLine(
"ICF1", 3));
71 timer01irq->registerLine(6,
IRQLine(
"OCF1", 4));
72 timer01irq->registerLine(7,
IRQLine(
"TOV1", 5));
76 timer01irq->getLine(
"TOV0"));
81 timer01irq->getLine(
"TOV1"),
82 timer01irq->getLine(
"OCF1"),
84 timer01irq->getLine(
"ICF1"),
97 rw[0x5f]= statusRegister;
103 rw[0x59]= & timer01irq->timsk_reg;
104 rw[0x58]= & timer01irq->tifr_reg;
110 rw[0x53]= & timer0->tccr_reg;
111 rw[0x52]= & timer0->tcnt_reg;
113 rw[0x4f]= & timer1->tccra_reg;
114 rw[0x4e]= & timer1->tccrb_reg;
115 rw[0x4d]= & timer1->tcnt_h_reg;
116 rw[0x4c]= & timer1->tcnt_l_reg;
117 rw[0x4b]= & timer1->ocra_h_reg;
118 rw[0x4a]= & timer1->ocra_l_reg;
120 rw[0x47]= & timer1->icr_h_reg;
121 rw[0x46]= & timer1->icr_l_reg;
123 rw[0x41]= & wado->wdtcr_reg;
125 rw[0x3f]= & eeprom->eearh_reg;
126 rw[0x3e]= & eeprom->eearl_reg;
127 rw[0x3d]= & eeprom->eedr_reg;
128 rw[0x3c]= & eeprom->eecr_reg;
132 rw[0x38]= & portb.port_reg;
133 rw[0x37]= & portb.ddr_reg;
134 rw[0x36]= & portb.pin_reg;
136 rw[0x35]= & portc.port_reg;
137 rw[0x34]= & portc.ddr_reg;
138 rw[0x33]= & portc.pin_reg;
140 rw[0x32]= & portd.port_reg;
141 rw[0x31]= & portd.ddr_reg;
142 rw[0x30]= & portd.pin_reg;
144 rw[0x2f]= & spi->spdr_reg;
145 rw[0x2e]= & spi->spsr_reg;
146 rw[0x2d]= & spi->spcr_reg;
148 rw[0x2c]= & uart->udr_reg;
149 rw[0x2b]= & uart->usr_reg;
150 rw[0x2a]= & uart->ucr_reg;
151 rw[0x29]= & uart->ubrr_reg;
153 rw[0x28]= & acomp->acsr_reg;
155 rw[0x27]= & ad->admux_reg;
156 rw[0x26]= & ad->adcsra_reg;
157 rw[0x25]= & ad->adch_reg;
158 rw[0x24]= & ad->adcl_reg;
160 rw[0x23]= & uart->ubrrhi_reg;
Basic AVR device, contains the core functionality.
HWARef * aref
adc reference unit
IOSpecialReg * gifr_reg
GIFR IO register.
Implements a stack with stack register using RAM as stackarea.
ADC reference is taken from special ADREF pin (no port pin)
Handler for external IRQ's to communicate with IRQ system and mask/flag registers.
Represents a timer interrupt line, Frontend for timer interrupts.
HWTimer8_0C * timer0
timer 0 unit
HWAdmux * admux
adc multiplexer unit
IOSpecialReg * gimsk_reg
GIMSK IO register.
Provices flag and mask register for timer interrupts and connects irq lines to irqsystem.
ADC type 4433: ADC on at90s/l4433.
IOSpecialReg * mcucr_reg
MCUCR IO register.
#define AVR_REGISTER(name, class)
HWTimer16_1C * timer1
timer 1 unit
ExternalIRQHandler * extirq
external interrupt support
Timer unit with 16Bit counter and one output compare unit.
Timer unit with 8Bit counter and no output compare unit.
Class, which provides input capture source for 16bit timers.
Implements the I/O hardware necessary to do UART transfers.
AVRDevice class for AT90S4433.
Analog comparator peripheral.
TimerIRQRegister * timer01irq
timer interrupt unit for timer
External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration.
ICaptureSource * inputCapture1
input capture source for timer1